IR22771S/IR21771S(PbF)
4
www.irf.com
Pin: PO
Symbol
Definition
Min
Typ
Max
Units
Test
Conditions
V
POs
Input offset voltage measured by PWM
output
-50
20
mV
R
pull-up
=500 &
f
sync
= 4, 20kHz
V
threshold
=2.75V
Ext supply=5V
(See Figure 6)
V
POs
/
T
Input offset voltage temperature drift
TBD
礦/癈
V
Pos
offset between samples on channel1
and channel2 measured at PO (See
Note1)
-10
10
mV
f
sync
= 10kHz
See Figure 6
G
p
PWM Output Gain
-38
-40.5 -42.5
%/V
V
in
=?50mV
G
p
/
Tj PWM Output Gain Temperature Drift
TBD
%/(V
*
篊)
CMRR
PO
PO Output common mode (V
S
) rejection
0.2
m%/V
V
S
-V
SS
= 0,
600V
f
sync
= 10kHz
V
Polin
PO Linearity
0.07
0.2
%
f
sync
= 10kHz
V
lin
/
Tj PO Linearity Temperature Drift
TBD
%/篊
f
sync
= 10kHz
V
thPO
PO threshold for OC reset
0.8
1.6
V
OC active (See
Figure 4
)
PSRR PO PSRR for PO Output
0.2
%/V
V
CC
=V
BS
=
8,20V
R
onPO
PO On Resistance
25
75
&
@ I = 2mA
See Figure 3
Note1: Refer to PO output description for channels definition
Figure 3: PO and OC open collector circuit
PO
or
OC
V
SS
Internal signal
R
ON
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